1 ?2003 by catalyst semiconductor, inc. characteristics subject to change without notice doc. no. 2009, rev. m applications automated product calibration remote control adjustments offset, gain and zero control tamper-proof calibrations contrast, brightness and volume controls motor controls and feedback systems programmable analog functions cat5113 100-tap digitally programmable potentiometer (dpp ) features 100-position linear taper potentiometer non-volatile eeprom wiper storage 10na ultra-low standby current single supply operation: 2.5v-6.0v increment up/down serial interface resistance values: 10k ? ? ? ? ? , 50k ? ? ? ? ? and 100k ? ? ? ? ? available in pdip, soic, tssop and msop p ackages new system values without effecting the stored setting. wiper-control of the cat5113 is accomplished with three input control pins, cs , u/ d , and inc . the inc input increments the wiper in the direction which is determined by the logic state of the u/ d input. the cs input is used to select the device and also store the wiper position prior to power down. the digitally programmable potentiometer can be used as a three-terminal resistive divider or as a two-terminal variable resistor. dpps bring variability and programmability to a wide variety of applications including control, parameter adjustments, and signal processing. functional diagram description the cat5113 is a single digitally programmable potentiometer (dpp ) designed as a electronic replacement for mechanical potentiometers and trim pots. ideal for automated adjustments on high volume production lines, they are also well suited for applications where equipment requiring periodic adjustment is either difficult to access or located in a hazardous or remote environment. the cat5113 contains a 100-tap series resistor array connected between two terminals r h and r l . an up/ down counter and decoder that are controlled by three input pins, determines which tap is connected to the wiper, r w . the wiper setting, stored in nonvolatile memory, is not lost when the device is powered down and is automatically reinstated when power is returned. the wiper can be adjusted to test general detailed electronic potentiometer implementation ( inc ) (u/ d ) ( cs ) control and memory increment up/down device select vcc (supply voltage) general r h v w l r r h v v w l / / / por gnd r h v w l r r h v v w l / / / h a l o g e n f r e e tm l e a d f r e e one of one hundred decoder 99 98 97 28 2 1 0 transfer gates resistor array r h l r h v v l / / v w r w / 7-bit nonvolatile memory store and recall control circuitry u /d inc cs vcc v ss 7-bit up/down counter
cat5113 2 doc. no. 2009, rev. m of the cat5113 and is active low. when in a high state, activity on the inc and u/ d inputs will not affect or change the position of the wiper. device operation the cat5113 operates like a digitally controlled potentiometer with r h and r l equivalent to the high and low terminals and r w equivalent to the mechanical potentiometer's wiper. there are 100 available tap positions including the resistor end points, r h and r l . there are 99 resistor elements connected in series between the r h and r l terminals. the wiper terminal is connected to one of the 100 taps and controlled by three inputs, inc , u/ d and cs . these inputs control a seven- bit up/down counter whose output is decoded to select the wiper position. the selected wiper position can be stored in nonvolatile memory using the inc and cs inputs. with cs set low the cat5113 is selected and will respond to the u/ d and inc inputs. high to low transitions on inc wil increment or decrement the wiper (depending on the state of the u/ d input and seven-bit counter). the wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. the value of the counter is stored in nonvolatile memory whenever cs transitions high while the inc input is also high. when the cat5113 is powered-down, the last stored wiper counter position is maintained in the nonvolatile memory. when power is restored, the contents of the memory are recalled and the counter is set to the value stored. with inc set low, the cat5113 may be de-selected and powered down without storing the current wiper position in nonvolatile memory. this allows the system to always power up to a preset value stored in nonvolatile memory. pin descriptions inc inc inc inc inc : increment control input the inc input moves the wiper in the up or down direction determined by the condition of the u/ d input. u/ d d d d d : up/down control input the u/ d input controls the direction of the wiper movement. when in a high state and cs is low, any high- to-low transition on inc will cause the wiper to move one increment toward the r h terminal. when in a low state and cs is low, any high-to-low transition on inc will cause the wiper to move one increment towards the r l terminal. r h: high end potentiometer terminal r h is the high end terminal of the potentiometer. it is not required that this terminal be connected to a potential greater than the r l terminal. voltage applied to the r h terminal cannot exceed the supply voltage, v cc or go below ground, gnd. r w : wiper potentiometer terminal r w is the wiper terminal of the potentiometer. its position on the resistor array is controlled by the control inputs, inc , u/ d and cs . voltage applied to the r w terminal cannot exceed the supply voltage, v cc or go below ground, gnd. r l : low end potentiometer terminal r l is the low end terminal of the potentiometer. it is not required that this terminal be connected to a potential less than the r h terminal. voltage applied to the r l terminal cannot exceed the supply voltage, v cc or go below ground, gnd. r l and r h are electrically interchangeable. cs cs cs cs cs : chip select the chip select input is used to activate the control input pin functions pin name function inc increment control u/ d up/down control r h potentiometer high terminal gnd ground r w potentiometer wiper terminal r l potentiometer low terminal cs chip select v cc supply voltage pin configuration dip package (p, l) tssop package (u, y) msop package (r, z) cs inc v cc u /d gnd r h r l r w 1 2 3 4 8 7 6 5 inc v cc cs u /d gnd r w r h r l 1 2 3 4 8 7 6 5 v cc r r gnd r inc u/ d cs w l h 1 2 3 4 8 7 6 5 cs inc v cc u /d gnd r h r l r w 1 2 3 4 8 7 6 5 soic package (s, w)
3 doc. no. 2009, rev. m operation modes absolute maximum ratings supply voltage v cc to gnd ...................................... 0.5v to +7v inputs cs to gnd ............................. 0.5v to v cc +0.5v inc to gnd ............................ 0.5v to v cc +0.5v u/ d to gnd ............................ 0.5v to v cc +0.5v h to gnd ................................ 0.5v to v cc +0.5v l to gnd ................................ 0.5v to v cc +0.5v w to gnd ............................... 0.5v to v cc +0.5v operating ambient temperature commercial ( c or blank suffix) ...... 0 c to +70 c industrial ( i suffix) ...................... 40 c to +85 c junction temperature ..................................... +150 c storage temperature ....................... 65 c to +150 c lead soldering (10 sec max) .......................... +300 c * stresses above those listed under absolute maximum ratings may cause permanent damage to the device. absolute maximum ratings are limited values applied individually while other parameters are within specified operating conditions, and functional operation at any of these conditions is not implied. device performance and reliability may be impaired by exposure to absolute rating conditions for extended periods of time. notes: (1) this parameter is tested initially and after a design or process change that affects the parameter. (2) latch-up protection is provided for stresses up to 100ma on address and data pins from 1v to v cc + 1v (3) i w =source or sink (4) these parameters are periodically sampled and are not 100% tested. r l c l c h r h c w r wb r wi potentiometer equivalent circuit inc cs u/d operation high to low low high wiper toward h high to low low low wiper toward l high low to high x store wiper position low low to high x no store, return to standby x high x standby reliability characteristics symbol parameter test method min typ max units v zap (1) esd susceptibility mil-std-883, test method 3015 2000 volts i lth (1)(2) latch-up jedec standard 17 100 ma t dr data retention mil-std-883, test method 1008 100 years n end endurance mil-std-883, test method 1003 1,000,000 stores power supply symbol parameter conditions min typ max units v cc operating voltage range 2.5 6.0 v i cc1 supply current (increment) v cc = 6v, f = 1mhz, i w =0 100 a v cc = 6v, f = 250khz, i w =0 50 i cc2 supply current (write) programming, v cc = 6v 1 ma v cc = 3v 500 a isb 1 (2) supply current (standby) cs=v cc -0.3v 0.01 1 a u/d, inc=v cc -0.3v or gnd dc electrical characteristics: v cc = +2.5v to +6.0v unless otherwise specified symbol parameter conditions min typ max units i ih input leakage current v in = v cc 10 a i il input leakage current v in = 0v 10 a v ih1 ttl high level input voltage 4.5v v cc 5.5v 2 v cc v v il1 ttl low level input voltage 0 0.8 v v ih2 cmos high level input voltage 2.5v v cc 6v v cc x 0.7 v cc + 0.3 v v il2 cmos low level input voltage -0.3 v cc x 0.2 v logic inputs
cat5113 4 doc. no. 2009, rev. m symbol parameter conditions min typ max units r pot potentiometer resistance -10 device 10 -50 device 50 k ? -00 device 100 pot resistance tolerance 15 % v rh voltage on r h pin 0 v cc v v rl voltage on r l pin 0 v cc v resolution 1% % inl integral linearity error i w 2 a 0.5 1 lsb dnl differential linearity error i w 2 a 0.25 0.5 lsb r wi wiper resistance v cc = 5v, i w = 1ma 400 ? v cc = 2.5v, i w = 1ma 1 k ? i w wiper current 1 ma tc rpot tc of pot resistance 300 ppm/ o c tc ratio ratiometric tc 20 ppm/ o c r iso isolation resistance tbd ? v n noise 100khz / 1khz 8/24 nv/ h z c h /c l /c w potentiometer capacitances 8/8/25 pf fc frequency response passive attenuator, 10k ? 1.7 mhz potentiometer parameters
5 doc. no. 2009, rev. m v cc range 2.5v v cc 6v input pulse levels 0.2v cc to 0.7v cc input rise and fall times 10ns input reference levels 0.5v cc ac conditions of test a. c. timing (1) typical values are for t a =25 ? c and nominal supply voltage. (2) this parameter is periodically sampled and not 100% tested. (3) mi in the a.c. timing diagram refers to the minimum incremental change in the w output due to a change in the wiper position . cs inc u /d r w t ci t cyc t il mi (3) 90% 90% 10% (store) t f t r t iw tid tdi t ih t cph t ic symbol parameter min typ (1) max units t ci cs to inc setup 100 ns t di u/ d to inc setup 50 ns t id u/ d to inc hold 100 ns t il inc low period 250 ns t ih inc high period 250 ns t ic inc inactive to cs inactive 1 s t cph cs deselect time (no store) 100 ns t cph cs deselect time (store) 10 ms t iw inc to v out change 15 s t cyc inc cycle time 1 s t r, t f (2) inc input rise and fall time 500 s t pu (2) power-up to wiper stable 1 msec t wr store cycle 510ms ac operating characteristics: v cc = +2.5v to +6.0v, v h = v cc , v l = 0v , unless otherwise specified
cat5113 6 doc. no. 2009, rev. m potentiometer configurations (a) resistive divider (b) variable resistance (c) two-port + + + v 1 (-) v 2 (+) r 1 r 2 r 2 r 3 r 3 r 4 v o a 3 r 4 +2.5v +5v 10 1 a 1 a 2 2 3 4 5 6 7 8 9 11 +5v u/ dpp cat5114/5113 { { 555 +5v .01 f 8 3 5 4 6 21 } } 5 7 r a r b r 1 r 2 +5v 8 4 2 1 7 pr pot (1-p)r pot u/ c .01 f, .003 f 3 6 applications programmable instrumentation amplifier programmable sq. wave oscillator (555) + + + sensor v corr 1.00v = v ref cat5112/5111 ic2 u/d inc cs 10k 0.01 f osc cs ic3a 1/4 74hc132 +5v +200mv 499k 499k 499k 1v + 50mv v sensr +5v 4 11 1 2 3 -5v v out = 1v + 1mv icia 100mv = v shift 499k 20k icib 6 5 7 applica tions informa tion sensor auto referencing circuit
7 doc. no. 2009, rev. m + +5v v o +2.5v 1f c1 .001 a1 c2 4 7 2 3 r2 10k cat5114/5113 r3 100k r1 50k .001 6 v s +5v + + + +5v chi clo ic3 cat5114/5113 +5v u/d inc cs 2 1 6 5 3 v s +2.5v 0 < v s < 2.5v osc ic2 74hc132 +5v ic1 393 2 3 v ll r 1 r 2 r 3 v ul 2.5v < v o < 5v v o ai ic4 6 5 +5v 1 7 10k 0.1 f 10k 8 4 7 control and memory por cat5114/5113 4 6 5 3 r3 10k r2 820 11k r1 6.8 f v 0 (reg) gnd sd v in (unreg) shutdown 1f +5v 8 2 1 7 2952 fb 1.23v v out 100k u/ .1 programmable voltage regulator applica tions informa tion + + 2 1 7 8 4 +5v +5v +5v } } pr (1-p)r 2 2 7 7 4 4 3 3 +2.5v a1 6 6 a2 1m 330 330 i s u/ 10k 6 5 3 cat5114/5113 v o lt1097 programmable i to v convertor + + + serial bus +5v +5v cat5112/5111 +2.5v r1 100k r1 100k r1 100k v s a2 7 5 6 +5v 4 1 11 +2.5v i s r 2.5k r1 100k 2 3 a1=a2=1/4 lmc6064a programmable bandpass filter programmable current source/sink automatic gain control
cat5113 8 doc. no. 2009, rev. m ordering information notes: (1) the device used in the above example is a cat5113 si-10te13 (soic, 10k ohms, industrial temperature, tape & reel) prefix device # suffix 5113 product number cat optional company id i te13 tape & reel te13: 2000/reel -10 resistance -10: 10kohms -50: 50kohms -00: 100kohms 5111: buffered 5113: unbuffered s package p: pdip s: soic u: tssop r: msop l: pdip (lead free, halogen free) w: soic (lead free, halogen free) y: tssop (lead free, halogen free) z: msop (lead free, halogen free) revision history date rev. reason 10/9/2003 m revised features revised dc electrical characteristics
9 doc. no. 2009, rev. m copyrights, trademarks and patents trademarks and registered trademarks of catalyst semiconductor include each of the following: dpp ae 2 catalyst semiconductor has been issued u.s. and foreign patents and has patent applications pending that protect its products. for a complete list of patents issued to catalyst semiconductor contact the company s corporate office at 408.542.1000. catalyst semiconductor makes no warranty, representation or guarantee, express or implied, regarding the suitability of its products for any particular purpose, nor that the use of its products will not infringe its intellectual property rights or the rights of third parties with respect to any particular use or application and specifically disclaims any and all liability aris ing out of any such use or application, including but not limited to, consequential or incidental damages. catalyst semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgica l implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the catalyst semic onductor product could create a situation where personal injury or death may occur. catalyst semiconductor reserves the right to make changes to or discontinue any product or service described herein without not ice. products with data sheets labeled "advance information" or "preliminary" and other products described herein may not be in production or offered for sale . catalyst semiconductor advises customers to obtain the current version of the relevant product information before placing order s. circuit diagrams illustrate typical semiconductor applications and may not be complete. catalyst semiconductor, inc. corporate headquarters 1250 borregas avenue sunnyvale, ca 94089 phone: 408.542.1000 fax: 408.542.1200 www.catsemi.com publication #: 2009 revison: m issue date: 10/9/03 type: final
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